Mainboard J&W RS780UVD-AM2+ (64&128)

+ "SP:UMA Interleave Ratio" = Assign for sideport using capacity and UMA using capacity
Example:
sideport = 128MB
SP:UMA Interleave Ratio set 1:1
==> UMA use 128MB
***********************************
JWooT -> DRAM Timing Configuration -> Memory Clock Mode
Memory Clock model:
auto: the DRAM speed will be based on SPDS;
limit: the DRAM spe will not exceed the specified value;
manual: the DRAM specified will be programmed regardless;
DC Mode:
ganged mode is 1x128bit dual channel
unganged is 2x64 bit dual channel

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